[Vitis hls] Cannot apply array transformation pragma/directive because of full array load/store.

Created by: Duchstf

Quick summary

I was trying to convert a quantized Conv1D model using Vitis HLS, and was seeing this error:

ERROR: [HLS 214-384] in function 'void nnet::conv_1d_latency_cl<ap_fixed<9, 3, (ap_q_mode)5, (ap_o_mode)3, 0>, ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>, config2>(ap_fixed<9, 3, (ap_q_mode)5, (ap_o_mode)3, 0>*, ap_fixed<16, 6, (ap_q_mode)5, (ap_o_mode)3, 0>*, config2::weight_t*, config2::bias_t*) (.304)': Cannot apply array transformation pragma/directive because of full array load/store. (firmware/nnet_utils/nnet_conv1d_latency.h:81:11)
ERROR: [HLS 200-1715] Encountered problem during source synthesis

Details

I'm using the current master hls4ml branch where the lastest commit is:

commit 2e71ff451cc36ce8e7319a92b65a5d9be8bff427 (HEAD -> main, origin/main, origin/HEAD)
Merge: eca1ea37 9d2e6640
Author: Jovan Mitrevski <jmitrevs@fnal.gov>
Date:   Tue May 16 13:55:19 2023 -0500

    Merge pull request #796 from fastmachinelearning/pre-commit-ci-update-config

Steps to Reproduce

I included the .h5 file of the model here.

And a script to convert the model here.

You could run the conversion using:

python hls_9bit_model.py

I'm not really sure what's happening here ...